1. Field of the Invention
The invention relates to a code error detecting circuit used for a CD-ROM MODEl, or a CD-ROM MODE 2, for example, and more specifically relates to a Cyclic Redundancy Check (hereafter, CRC) circuit for detecting errors using a CRC code or an (Error Detection Code) code (hereafter, these are referred to as CRC code) used in a field such as communication or stored media.
2. Description of the Prior Art
A CRC code word in a CD ROM MODE 1, for example, is constructed by a fixed pattern for synchronization, a data subsequent to the fixed pattern, and an error detection code (CRC code) given to this fixed pattern and data. A CRC circuit for detecting code errors as a block of CRC code word is recited in Japanese Patent Publication No. 4-81896.
The CRC circuit disclosed in this Japanese Patent publication comprises a NOR circuit and a division circuit comprised of a plurality of shift registers and an initialization set-up means. A data of CRC code and the CRC code word are inputted into the NOR circuit. The output of the NOR circuit is inputted into the division circuit. If all of bits from each division are "0", it indicates that the CRC code word does not include errors, while if one or more bits from each division are "1", it indicates that the CRC code word includes errors. The initialization set-up means sets an initial state of the registers to the same state as that which is obtained when the fixed pattern of the CRC code is successively inputted.